A Modified Noise Analysis of a Common Source ̶ Common Gate Low Noise Transconductance Amplifier for Sub-micron Technologies

Authors

  • H. Miar-Naimi Department of Electronics, School of Electrical and Computer Engineering, Noshirvani University of Technology, Babol, Mazandaran, Iran
  • M. Javadi Department of Electronics, School of Electrical and Computer Engineering, Noshirvani University of Technology, Babol, Mazandaran, Iran
  • S. M. Hosseini-Andargoli Department of Electronics, School of Electrical and Computer Engineering, Noshirvani University of Technology, Babol, Mazandaran, Iran
Abstract:

This paper is based on analysis of a common source - common gate low noise transconductance amplifier (CS-CG LNTA). Conventional noise analyses equations are modified by considering to the low output impedance of the sub-micron transistors and also, parasitic gate-source capacitance. The calculated equations are more accurate than calculated equations in other works. Also, analyses show that the noise of the tail transistor, which is utilized to bias the common gate transistor, will limit noise canceling advantages. So, the common gate transistor is biased by a resistor. That leads to a significant improvement in noise figure. By utilizing a Taylor series expression, a closed-form equation is obtained to calculate IIA3 for the first time. Finally, based on the calculated equation a design procedure is proposed.

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Journal title

volume 31  issue 11

pages  1903- 1909

publication date 2018-11-01

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